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10-Port, Constant-Current LED Driver and
I/O Expander with PWM Intensity Control
and requires sending at least the MAX6946/MAX6947s’
I 2 C slave address. When using the internal oscillator,
the minimum timeout period is 127/45000 equal to
2.822ms. When using an external oscillator for the PWM
clock, the timeout period is 127/OSC. The shortest time
period allowed is 1.27ms; this number corresponds to
the maximum OSC frequency of 100kHz. When using
the internal oscillator, the minimum I 2 C clock speed
that guarantees a successful start bit and eight data
bits (9 bits total) within the minimum timeout period is
9/5.66ms equal to 1590Hz. Canceling the Reset Run
trigger clears the Reset Run bit (D1) in the configura-
tion register, disabling Reset Run. The run bit (D0) in
the configuration register remains cleared, so the driver
remains in shutdown.
OSC Input
The MAX6946 can use an external clock of up to
100kHz instead of the internal 32kHz oscillator.
Connect the external clock to the OSC input and set the
OSC bit in the configuration register to enable the
MAX6946 to use the external clock (Table 2).
Serial Interface
Serial Addressing
The MAX6946/MAX6947 operate as a slave that sends
and receives data through an I 2 C-compatible, 2-wire
interface. The interface uses a serial-data line (SDA)
and a serial-clock line (SCL) to achieve bidirectional
communication between master(s) and slave(s). A
master (typically a microcontroller) initiates all data
transfers to and from the MAX6946/MAX6947 and gen-
erates the SCL clock that synchronizes the data trans-
fer (Figure 8).
The MAX6946/MAX6947 SDA line operates as both an
input and an open-drain output. A pullup resistor, typi-
cally 4.7k Ω , is required on SDA. The MAX6946/
MAX6947 SCL line operates as an input. A pullup resis-
tor, typically 4.7k Ω , is required on SCL if there are mul-
tiple masters on the 2-wire interface, or if the master in
a single-master system has an open-drain SCL output.
Each transmission consists of a START condition
(Figure 9) sent by a master, followed by the MAX6946/
MAX6947 7-bit slave address plus the R/ W bit, a regis-
ter address byte, one or more data bytes, and finally a
STOP condition (Figure 9).
SDA
t LOW
t SU,DAT
t HD,DAT
t SU,STA
t HD,STA
t SU,STO
t BUF
SCL
t HD,STA
t R
t HIGH
t F
START CONDITION
REPEATED START CONDITION
STOP
CONDITION
START
CONDITION
Figure 8. 2-Wire Serial Interface Timing Details
16
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